1. Field of the Invention
The present invention relates to a circuit for generating a voltage of a prescribed level in a semiconductor device. More specifically, it relates a structure of an internal power supply circuit generating an internal power supply voltage by lowering an external power supply voltage, and especially to a structure of an internal power supply circuit with low power consumption.
2. Description of the Background Art
In a semiconductor integrated circuit, a voltage source is required in some cases which supplies a voltage of a prescribed voltage level not dependent on an external power supply voltage. One of such cases is as follows. In order to achieve higher density and higher degree of integration, semiconductor elements which are the components are miniaturized. The miniaturized semiconductor element has its break down voltage decreased, and therefore power supply voltage (operational power supply voltage) of a semiconductor integrated circuit including such miniaturized semiconductor elements as its components must be lowered. However, it is impossible in a certain case to lower an external power supply voltage in practice. For example, in a DRAM (Dynamic Random Access Memory) having large storage capacity, the power supply voltage (operational power supply voltage) is lowered in view of break down voltage of the elements, speed of operation and power consumption. However, a microprocessor and a logic LSI (Large Scale Integrate Circuit), which are external devices, have their components not so much miniaturized as compared with DRAM, and hence the power supply voltage for these devices cannot be made as low as the power supply voltage of the DRAM. Therefore, when a system is to be constructed by using the DRAM, a microprocessor and the like, a power supply voltage of a higher voltage level required by the microprocessor and a logic LSI is used as the system power supply source.
When the system power supply source, that is, the external power supply voltage is relatively high, a circuit (an internal voltage down converter) for generating an internal power supply voltage by internally lowering the external power supply voltage is provided in a semiconductor device such as the DRAM or the like which requires lower operational power supply voltage.
FIG. 20 schematically shows a whole structure of a semiconductor device, which is, for example, a DRAM including such an internal voltage down converter. Referring to FIG. 20, a semiconductor device 900 includes an external power supply line 902 for transmitting an external power supply voltage EXV applied to a power supply terminal 901; one power supply line (hereinafter referred as ground line) 904 for transmitting one power supply voltage (hereinafter referred to as the ground voltage) Vss applied to one power supply terminal (hereinafter referred to as the ground terminal 903; and internal voltage down converter 905 which operates using both voltages EXV and Vss on external power supply line 902 and the ground line 904 as two operation power supply voltages, lowering (down-converting)the external power supply voltage EXV for generating an internal power supply voltage VCI. The structure of the internal voltage down converter 905 will be described later. The internal voltage down converter 905 has a function of generating an internal power supply voltage VCI which is, with the external power supply voltage EXV being within a prescribed range, stable and not influenced by the fluctuation of the external power supply voltage.
The semiconductor device 900 further includes a circuit 907 using internal power supply, which operates using voltages VCI and Vss on internal supply line 906 and ground line 904 as two operational power supply voltages, and a circuit 908 using external power supply which operates using the external power supply voltage EXV on eternal power supply line 902 and the ground voltage Vss on the ground line 904 as two operational power supply voltages. The circuit 908 using the external power supply is connected to an input/output terminal 909 and has a function of providing an interface with an external device. As an internal power supply voltage VCI of a prescribed voltage level is generated by using internal voltage down converter 905 in semiconductor device 900, breakdown voltage characteristics of the elements included in the circuit 907 using internal power supply, which are the main components, can be ensured, the speed of operation can be improved as the signal amplitude is made small, and power consumption is reduced.
FIG. 21 schematically shows a structure of internal voltage down converter 95 shown in FIG. 20. Referring to FIG. 21, internal voltage down converter 905 includes a reference voltage generating circuit 910 for generating a reference voltage vref of a prescribed voltage level from the external power supply voltage EXV applied to external power supply terminal 901; a comparing circuit 912 for comparing internal power supply voltage VCI on internal power supply line 906 with the reference voltage Vref; and a drive element 914 consisting of a p channel MOS transistor (insulated gate type field effect transistor) 914 for supplying current from external power supply terminal 901 to internal power supply line 906 in accordance with an output signal from comparing circuit 912. Comparing circuit 912 receives at its positive input the internal power supply voltage VCI on internal power supply 906, and at its negative input, the reference voltage Vref. Generally, comparing circuit 912 is formed by a differential amplifying circuit, and it differentially amplifies the internal power supply voltage VCI and the reference voltage Vref. The operation will be briefly described.
From the reference voltage generating circuit 910, a reference voltage Vref of a prescribed voltage level, which is not dependent on the external power supply voltage EXV if the voltage EXV falls within a predetermined voltage region is generated. If the internal power supply voltage VCI on internal power supply line 906 is higher than the reference voltage Vref, an output from comparing circuit 12 attains to a high level, and drive element 914 is turned off. In this state, current is not supplied from external power supply terminal 901 to internal power supply line 906. Meanwhile, if internal power supply voltage VCI is lower than the reference voltage Vref, the output signal from comparing circuit 912 attains to a low level in accordance with the difference between the internal power supply voltage VCI and reference voltage Vref, conductance of drive element 914 is increased (turned on), the drive element 914 supplies current from external power supply terminal 901 to internal power supply line 906, so that the voltage level of internal power supply voltage line 906 is increased. By the feedback loop formed by comparing circuit 912, drive element 914 and internal power supply line 906, internal power supply voltage VCI is maintained at the voltage level of reference voltage Vref.
FIG. 22 shows an example of a specific structure of comparing circuit 912 shown in FIG. 21. Referring to FIG. 22, comparing circuit 912 includes n channel MOS transistors NT1 and NT2 constituting a differential stage for comparing internal power supply voltage VCI with the reference voltage Vref, and p channel MOS transistors PT3 and PT4 constituting a current mirror circuit for supplying current to transistors NT1 and NT2. MOS transistor PT3 supplies current from external power supply line 902 to MOS transistor NT1. MOS transistor PT4 supplies current from external power supply line 902 to MOS transistor NT2. MOS transistors NT1 and NT2 have their sources connected to the ground line 904 through a current source CT5. MOS transistor PT3 has its gate and drain connected to each other, and provides a master stage of the current mirror circuit. When MOS transistors PT3 and PT4 have the same size, a current having the same magnitude as the current flowing through MOS transistor PT3 flows through MOS transistor PT4.
The operation will be briefly described. When internal power supply voltage VCI is higher than reference voltage Vref, conductance of MOS transistor NT1 becomes higher than that of MOS transistor NT2, and current flowing through MOS transistor NT1 becomes larger than the current flowing through MOS transistor NT2. MOS transistor NT1 is supplied with current from MOS transistor PT3. MOS transistor PT4 supplies a mirror current of the current flowing through MOS transistor PT3 to MOS transistor NT2. MOS transistor NT2 cannot discharge all the current supplied from MOS transistor PT4, so that potential at node 920 increases, conductance of drive element 914 shown in FIG. 21 decreases, and current supply from external power supply terminal 901 to internal power supply line 906 is reduced or stopped.
Meanwhile, if the internal power supply voltage VCI is lower than the reference voltage Vref, conversely the current flowing through MOS transistor NT2 becomes larger than the current flowing through MOS transistor NT1. Since MOS transistor PT3 supplies the current flowing through MOS transistor NT1, the current flowing through MOS transistor PT4 becomes smaller accordingly, and the current from MOS transistor PT4 is all discharged to the ground line 904 through MOS transistor NT2 and current source CT5. Therefore, potential at node 920 lowers, conductance of drive element 914 is increased, and current is supplied from external power supply terminal 901 to internal power supply line 906.
When comparing circuit 912 is formed by using above described current mirror type differential amplifier, a constant current flows through a constant current source CT5 between external power supply line 902 and ground line 904. By shutting off the constant current source CT5 in a stand-by cycle, it is possible to reduce current consumption in comparing circuit 912. However, in an active cycle in which the semiconductor device actually operates, a constant current continuously flows from external power supply line 902 to ground line 912, and as the current mirror type differential amplifier is a current driving circuit requiring relatively large current flowing therethrough (in order to change the potential at node 920 at high speed), the constant current source CT5 must provide relatively large current. This results in relatively large current consumption.
The above described problem arises in a circuit generating an internal voltage of a prescribed voltage level by driving a drive element by using a current mirror type differential amplifying circuit.